{
"title": "Intel Foundry Validates Keysight’s RFPro for Next-Gen Nodes, Slashing Simulation Risk for Chip Teams",
"content": "On July 29, 2026, Keysight Technologies announced that its RFPro electromagnetic simulation software has been certified for Intel Foundry’s 18A-P and 14A process technologies. The move gives RFIC and mixed-signal design teams a pre-validated path to catch layout-induced bugs before committing to a tape-out on Intel’s most advanced nodes. For engineering teams racing to get AI accelerators, 5G front-ends, or high-performance computing chips to market, that virtual safety net could mean the difference between a first-pass success and a costly, months-long re-spin.

What the Certification Actually Covers

Keysight’s RFPro is an EM simulator integrated into the Advanced Design System (ADS) EDA platform. Its job is to model how the physical layout of a chip—interconnects, inductors, parasitics—affects circuit behavior at high frequencies. The new certification means that RFPro has been validated against Intel Foundry’s process design kits (PDKs) for two upcoming nodes: Intel 18A-P and Intel 14A.

Intel 18A-P is an enhancement of the existing Intel 18A node, retaining design-rule compatibility. The company said in June 2026 that 18A-P had entered risk production, meaning it’s moving from development toward early customer pilot runs. Designers already working on 18A can carry over their IP and reuse many of their design flows, which should ease the transition.

Intel 14A is a longer-range platform that introduces RibbonFET 2 gate-all-around transistors and PowerDirect backside power delivery. Intel has shared internal performance projections—comparing it to 18A—but no independent silicon results are yet available. The node isn’t in production yet, and the certification doesn’t guarantee when it will be. What it does is give design teams a head start: they can begin simulating with RFPro using early PDK data, rather than waiting for a mature design ecosystem to catch up.

The announcement isn’t a product launch, and it doesn’t certify that any particular design will work. It’s a tool qualification that says, “If you use RFPro following Intel’s guidelines, your EM simulation results will match what Intel’s own models predict.” That’s a critical handshake for avoiding silicon surprises.

Why Electromagnetic Simulation Matters More with Every Node

As transistors shrink and clock speeds climb, a chip’s physical geometry increasingly dominates its electrical performance. Traces that act as simple wires at lower frequencies become transmission lines with inductance and capacitance that can distort signals or waste power. A layout that passes circuit simulation but fails in the real world can be an expensive mistake: a leading-edge mask set alone can cost millions, and a re-spin can add six months to a project.

RFPro lets engineers perform EM analysis inside the same ADS environment where they’re tuning circuits. Instead of running circuit simulations first and then doing a separate EM extraction as a late-stage signoff, they can iterate on the fly. The tool meshes the physical layout, computes S-parameters, and feeds the results back into the circuit simulator. This co-design loop catches “eyebrow-raising” coupling, unexpected resonances, or power-delivery issues before they become locked into the final mask.

The need for this capability grows with Intel’s 18A-P and